Project Information                                           c:\bean\3mux.rpt

MAX+plus II Compiler Report File
Version 7.0 08/26/96
Compiled: 03/12/97 21:39:51

Copyright (c) Altera Corporation, 1996. This file may contain proprietary and confidential
information of Altera Corporation that may be used, copied, and disclosed only pursuant to
the terms of Altera's Program License Agreement. Altera makes no claim to any end-user or
third-party proprietary information that also may be contained in this file. This notice
must be contained as part of this text at all times.



***** Project compilation was successful


Untitled


** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

3mux      EPM7128ELC84-7   11       3        0      3       0           2  %

User Pins:                 11       3        0  



Project Information                                           c:\bean\3mux.rpt

** PROJECT COMPILATION MESSAGES **

Warning: Line 5, File c:\bean\3mux.tdf:
   Symbolic name "cs_io" was declared but never used
Warning: Ignored unnecessary INPUT pin 'cs_io'


Device-Specific Information:                                  c:\bean\3mux.rpt
3mux

***** Logic for device '3mux' compiled without errors.




Device: EPM7128ELC84-7
Turbo: ON
Security: OFF
                l     g  g        l                                            
                a  l  o  o     g  a                                            
                s  a  _  _     o  s  d                    R  R  R     R  R     
                t  s  a  a     _  t  o                    E  E  E     E  E     
                t  t  c  c     a  t  n                    S  S  S     S  S  l  
                a  t  k  k     c  a  e                    E  E  E     E  E  a  
                _  a  _  _     k  _  _                    R  R  R     R  R  s  
                r  _  r  r  G  _  r  r  V  G  G  G  G  G  V  V  V  V  V  V  t  
                a  i  o  a  N  i  o  o  C  N  N  N  N  N  E  E  E  C  E  E  t  
                m  o  m  m  D  o  m  m  C  D  D  D  D  D  D  D  D  C  D  D  a  
              -----------------------------------------------------------------_ 
            /  11 10  9  8  7  6  5  4  3  2  1 84 83 82 81 80 79 78 77 76 75   | 
    cs_ram | 12                                                              74 | done 
       VCC | 13                                                              73 | go_ack 
  RESERVED | 14                                                              72 | GND 
  RESERVED | 15                                                              71 | RESERVED 
  RESERVED | 16                                                              70 | RESERVED 
  RESERVED | 17                                                              69 | RESERVED 
    cs_rom | 18                                                              68 | RESERVED 
       GND | 19                                                              67 | RESERVED 
   done_io | 20                                                              66 | VCC 
  done_ram | 21                                                              65 | RESERVED 
  RESERVED | 22                        EPM7128ELC84-7                        64 | RESERVED 
  RESERVED | 23                                                              63 | RESERVED 
  RESERVED | 24                                                              62 | RESERVED 
  RESERVED | 25                                                              61 | RESERVED 
       VCC | 26                                                              60 | RESERVED 
  RESERVED | 27                                                              59 | GND 
  RESERVED | 28                                                              58 | RESERVED 
  RESERVED | 29                                                              57 | RESERVED 
  RESERVED | 30                                                              56 | RESERVED 
  RESERVED | 31                                                              55 | RESERVED 
       GND | 32                                                              54 | RESERVED 
           |_  33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53  _| 
             ------------------------------------------------------------------ 
                R  R  R  R  R  V  R  R  R  G  V  R  R  R  G  R  R  R  R  R  V  
                E  E  E  E  E  C  E  E  E  N  C  E  E  E  N  E  E  E  E  E  C  
                S  S  S  S  S  C  S  S  S  D  C  S  S  S  D  S  S  S  S  S  C  
                E  E  E  E  E     E  E  E        E  E  E     E  E  E  E  E     
                R  R  R  R  R     R  R  R        R  R  R     R  R  R  R  R     
                V  V  V  V  V     V  V  V        V  V  V     V  V  V  V  V     
                E  E  E  E  E     E  E  E        E  E  E     E  E  E  E  E     
                D  D  D  D  D     D  D  D        D  D  D     D  D  D  D  D     
                                                                               
                                                                               


N.C. = Not Connected.
VCC = Dedicated power pin, which MUST be connected to VCC.
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.



Device-Specific Information:                                  c:\bean\3mux.rpt
3mux

** RESOURCE USAGE **

                                                Shareable     External
Logic Array Block     Logic Cells   I/O Pins    Expanders   Interconnect

A:     LC1 - LC16     0/16(  0%)   8/ 8(100%)   0/16(  0%)   0/36(  0%) 
B:    LC17 - LC32     0/16(  0%)   3/ 8( 37%)   0/16(  0%)   0/36(  0%) 
C:    LC33 - LC48     0/16(  0%)   0/ 8(  0%)   0/16(  0%)   0/36(  0%) 
D:    LC49 - LC64     0/16(  0%)   0/ 8(  0%)   0/16(  0%)   0/36(  0%) 
E:    LC65 - LC80     0/16(  0%)   0/ 8(  0%)   0/16(  0%)   0/36(  0%) 
F:    LC81 - LC96     0/16(  0%)   0/ 8(  0%)   0/16(  0%)   0/36(  0%) 
G:   LC97 - LC112     0/16(  0%)   0/ 8(  0%)   0/16(  0%)   0/36(  0%) 
H:  LC113 - LC128     3/16( 18%)   3/ 8( 37%)   0/16(  0%)  11/36( 30%) 


Total dedicated input pins used:                 0/4    (  0%)
Total I/O pins used:                            14/64   ( 21%)
Total logic cells used:                          3/128  (  2%)
Total shareable expanders used:                  0/128  (  0%)
Total Turbo logic cells used:                    3/128  (  2%)
Total shareable expanders not available (n/a):   0/128  (  0%)

Total input pins required:                      11
Total input registers required:                  0
Total output pins required:                      3
Total bidirectional pins required:               0
Total logic cells required:                      3
Total flipflops required:                        0
Total shareable expanders in database:           0

Synthesized logic cells:                         0/ 128 (  0%)



Device-Specific Information:                                  c:\bean\3mux.rpt
3mux

** INPUTS **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  12    (3)  (A)      INPUT              0      0   0    0    0    3    0  cs_ram
  18   (24)  (B)      INPUT              0      0   0    0    0    3    0  cs_rom
  20   (21)  (B)      INPUT              0      0   0    0    0    1    0  done_io
  21   (19)  (B)      INPUT              0      0   0    0    0    1    0  done_ram
   4   (16)  (A)      INPUT              0      0   0    0    0    1    0  done_rom
   6   (13)  (A)      INPUT              0      0   0    0    0    1    0  go_ack_io
   8   (11)  (A)      INPUT              0      0   0    0    0    1    0  go_ack_ram
   9    (8)  (A)      INPUT              0      0   0    0    0    1    0  go_ack_rom
  10    (6)  (A)      INPUT              0      0   0    0    0    1    0  lastta_io
  11    (5)  (A)      INPUT              0      0   0    0    0    1    0  lastta_ram
   5   (14)  (A)      INPUT              0      0   0    0    0    1    0  lastta_rom


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                                  c:\bean\3mux.rpt
3mux

** OUTPUTS **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  74    117    H     OUTPUT     t        0      0   0    5    0    0    0  done
  73    115    H     OUTPUT     t        0      0   0    5    0    0    0  go_ack
  75    118    H     OUTPUT     t        0      0   0    5    0    0    0  lastta


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                                  c:\bean\3mux.rpt
3mux

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'H':

               Logic cells placed in LAB 'H'
        +----- LC117 done
        | +--- LC115 go_ack
        | | +- LC118 lastta
        | | | 
        | | |   Other LABs fed by signals
        | | |   that feed LAB 'H'
LC      | | | | A B C D E F G H |     Logic cells that feed LAB 'H':

Pin
12   -> * * * | - - - - - - - * | <-- cs_ram
18   -> * * * | - - - - - - - * | <-- cs_rom
20   -> * - - | - - - - - - - * | <-- done_io
21   -> * - - | - - - - - - - * | <-- done_ram
4    -> * - - | - - - - - - - * | <-- done_rom
6    -> - * - | - - - - - - - * | <-- go_ack_io
8    -> - * - | - - - - - - - * | <-- go_ack_ram
9    -> - * - | - - - - - - - * | <-- go_ack_rom
10   -> - - * | - - - - - - - * | <-- lastta_io
11   -> - - * | - - - - - - - * | <-- lastta_ram
5    -> - - * | - - - - - - - * | <-- lastta_rom


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                  c:\bean\3mux.rpt
3mux

** EQUATIONS **

cs_ram   : INPUT;
cs_rom   : INPUT;
done_io  : INPUT;
done_ram : INPUT;
done_rom : INPUT;
go_ack_io : INPUT;
go_ack_ram : INPUT;
go_ack_rom : INPUT;
lastta_io : INPUT;
lastta_ram : INPUT;
lastta_rom : INPUT;

-- Node name is 'done' 
-- Equation name is 'done', location is LC117, type is output.
 done    = LCELL( _EQ001 $  GND);
  _EQ001 = !cs_ram &  cs_rom &  done_rom
         # !cs_ram & !cs_rom &  done_io
         #  cs_ram &  done_ram;

-- Node name is 'go_ack' 
-- Equation name is 'go_ack', location is LC115, type is output.
 go_ack  = LCELL( _EQ002 $  GND);
  _EQ002 = !cs_ram &  cs_rom &  go_ack_rom
         # !cs_ram & !cs_rom &  go_ack_io
         #  cs_ram &  go_ack_ram;

-- Node name is 'lastta' 
-- Equation name is 'lastta', location is LC118, type is output.
 lastta  = LCELL( _EQ003 $  GND);
  _EQ003 = !cs_ram &  cs_rom &  lastta_rom
         # !cs_ram & !cs_rom &  lastta_io
         #  cs_ram &  lastta_ram;



--     Shareable expanders that are duplicated in multiple LABs:
--     (none)




Project Information                                           c:\bean\3mux.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Standard

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'MAX7000E' family

      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      PARALLEL_EXPANDERS                  = off
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SOFT_BUFFER_INSERTION               = on
      SUBFACTOR_EXTRACTION                = on
      TURBO_BIT                           = on
      XOR_SYNTHESIS                       = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic I/O Cell Registers        = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      One-Hot State Machine Encoding      = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Smart Recompile                           = off
Total Recompile                           = off

Interface Menu Commands
-----------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:04
   Database Builder                       00:00:01
   Logic Synthesizer                      00:00:03
   Partitioner                            00:00:03
   Fitter                                 00:00:07
   Timing SNF Extractor                   00:00:01
   Assembler                              00:00:02
   --------------------------             --------
   Total Time                             00:00:21


Memory Allocated
-----------------

Peak memory allocated during compilation  = 3,293K
